#include <riscv/csr.h>
#include <riscv/asm-offset.h>
#include <riscv/asm.h>
#include <asm/linkage.h>

ENTRY(setup_trap_vector)
	/* Set trap vector to exception handler */
	la a0, handle_exception
	csrw CSR_TVEC, a0

	/*
	 * Set sup0 scratch register to 0, indicating to exception vector that
	 * we are presently executing in kernel.
	 */
	csrw CSR_SCRATCH, zero
	ret
